Project Profile: Applied Materials (SunPath 2)

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Awardee Name: Applied Materials
Project Title: Epitaxial-Silicon Wafer Integrated Pilot Production Line
Funding Opportunity: SunShot Technology to Market (SunPath 2)
SunShot Subprogram: Technology to Market
Location:  Santa Clara, CA
Amount Awarded: $5,067,147
Awardee Cost Share: $4,999,900
Project Investigator: James Gee

Producing silicon wafers in bulk can be costly due to the significant waste associated with typical wafer production processes. This project seeks to reduce silicon waste—or kerf loss—and simplify the wafer production process. The team will produce kerfless substrates using epitaxial silicon growth over a porous-silicon template. Under a current Energy Department-funded project, the team has developed an epitaxial chemical vapor deposition (CVD) reactor to produce silicon wafers via epitaxial growth and lift-off. This project will scale the laboratory process for the high volume production of kerfless epitaxial-silicon substrates. 

Approach

Applied Materials will develop laboratory scale tools for several of the process steps, demonstrate the process integration, examine the yield and distribution of epitaxy silicon substrate production, and provide a sufficient quantity of epitaxial substrates that meet requirements for high-efficiency solar cell applications. The research will result in a new epitaxial substrate production process and modules that are ready for high-volume production.

Innovation

Typically, silicon wafers are cut from a large ingot using a wiring process that causes up to half of the high quality silicon to be wasted. For large photovoltaic manufacturing projects, this proves to be an inefficiency and expensive process. This project will feature a double-sided silicon epitaxy process to produce multiple wafers from a silicon wafer substrate. This process includes anodically etching the surfaces of a silicon wafer, depositing epitaxial silicon via CVD, and exfoliating the epitaxial wafers from both front and back surfaces of the template wafer via a lift-off process. The double-sided processing is different than current single-sided epitaxial processes and will enable two wafers to be made at a time, potentially doubling the production of wafers.